The present invention relates generally to semiconductor fabrication and specifically to a technique for backside wafer etching. Backside wafer etching or stripping is typically used to strip polysilicon, nitride or oxide. Backside wafer etching is done after the thin film depositions and before metallization is applied.
In the past, industry practice has been to coat the front side of the wafer with resist to protect the front side during the process of stripping the backside of the wafer.
The steps for this stripping process typically include the following.
Precoating inspection of the wafer. PA1 Coating the front side of the wafer with resist. PA1 Inspection for pinholes in resist. PA1 Baking of the wafer. PA1 Plasma etching to strip polysilicon, nitride or oxide from backside of wafer. PA1 O.sub.2 H Asher process to begin removal of resist. PA1 Wet etch stripping process, e.g., sulfuric peroxide. PA1 Post inspection to confirm removal of resist.
The steps that have been described represent a significant number of steps in the processing of semiconductors. The steps described also represent a significant cost to semiconductor manufacturers. Thus a need exists for a technique to reduce the number of steps required for back side etching of semiconductor wafers.